Review Comment

[EECS E4321] Digital VLSI Circuits

January 12, 2017

Shepard, Kenneth
[EECS E4321] Digital VLSI Circuits

Anyone who has ever taken this course will tell you how insane it really is. They'll tell how much work it is, how it takes away every last shred of sanity left in your life and mocks you with how much more work you still need to do. They'll tell you how you must be prepared to spend all your days and all your nights at the lab. But that's all just lies. It's worse.

Navigating through the lectures -

The course starts off right from the very first lecture. The first thing you realize in class is one, that Shepard is a veritable rockstar when it comes to VLSI. He'll command your attention with brilliantly simple explanations of often complex concepts and pepper his lectures with amusing stories that keep you engaged. And that is of the utmost importance in his class because as a rule, "anything that appears on the board is fair game for the tests". Which brings us to the second thing you will realize in class - He does not teach from the textbook. Although Weste and Harris (which is an excellent book, in my opinion) is the prescribed textbook for the course, Shepard rarely teaches anything straight out of it. In addition to that, one may also have to reference Rabaey (too wordy, in my opinion) from time to time. Hence this is my advice. Take down every single syllable, every phoneme that comes out of Shepard's mouth, because notes are everything in this class.

Problem Sets - Total 10 PSets (20% of the grade)

Other than the first couple of PSets, all of them build upto the final project, which is the design of a functional 8-Bit "simple" microcontroller. All PSets are long and all PSets are difficult, without exception.

Most PSets in grad school are above average difficulty level. Shepard's problems are slightly more difficult than that. He'll give you two weeks to finish the first four homework assignments, couple of which are pen and paper. The TA recitations were really helpful in getting the homework done. Afterward, when you start working on the Cadence Virtuoso and layout based problems, the assignments are due weekly and it's a nightmare to submit on time. I have two very important pieces of advice about this:
1. DO NOT START LATE. None of the PSets can be finished in a day or even two. Start as early as possible. Because I promise, it takes centuries to get the hang of everything and it takes millennia to get your layout DRC and LVS clean.
2. FEAR THE SRAM. The SRAM circuitry is the most nightmarish part of the entire design. Know that you'll have a terrible week, when that is due.

Project - (15% of the grade)

PUT AS MUCH THOUGHT INTO YOUR CHOICE OF A PROJECT PARTNER AS YOU WOULD WITH THE CHOICE OF A SPOUSE. The project needs two people working in tandem all the time, and even then it is barely doable within the deadline. You cannot afford to slack or have a project partner who would do so.

Exams - One midterm (25% of the grade) and one Final (40% of the grade)

The exams are a mixed bag. A culpa review said that exams are mostly based on previous years' questions, a claim corroborated by students who had taken the course before us. But while that was fairly true for the midterm examination, the final was a different story altogether. Therefore I think it is fair to say that the exam difficulty depends mostly on Shepard's whimsy. As long as you've gone through everything covered in class though, you should be fine.

This class is what Stockholm Syndrome would look like if it were a grad school course. It is a semester's worth of pure torture, anguish, pain, and agony. But it is easily one of the best courses I have taken in my entire life. Shepard is an amazing instructor and you get to learn a lot. Plus you get fairly proficient with working on the Cadence Virtuoso tool, which is an industry standard and therefore a neat skill to have on your resume.

Be prepared to spend all your time in the lab and to live on a steady diet of caffeine and junk food from the first floor vending machine in Mudd if you are planning to take the course next Fall.

Happy "layout-ing". :D

Workload:

On a scale of one to crazy, you're looking at Deadpool level insanity.
I kid you not, "dat shit cray".
"Kill me now" would be your default state of existence.
Your roommates would call you up to check if you're still alive, cuz they haven't seen you in days.

.. I could go on. But you get the picture.

December 28, 2013

Shepard, Kenneth
[EECS E4321] Digital VLSI Circuits

Please keep in mind that this review is more than 5 years old.

So. This class is a mixed bag. First off, I was perplexed that given the notoriety of this course, there was no CULPA review. I guess either people expect you to already know about it or are so sick of it by the end that they don't want to think about it anymore. In any case, this class is without a doubt the most work I have ever done for a class so far as a senior undergrad EE. The usefulness of this work... well that's debatable and I'll elaborate.

The crux of this class is the "mini" design project as Shepard calls it, which is to design and layout in CAD an entire microprocessor core. This process is an unbelievable amount of work and everything in the class is built around this project. While the class starts off at a slower pace, it quickly picks up and by about halfway through the semester, you will be designing and laying out about a block of the processor per week. Every problem set builds up to this task, either by teaching you a skill you need or straight up designing a part of it. I highly recommend that you start the problem sets early and to not skip them as you will likely have to catch up later. In the final week or so, you'll be finishing the last pieces and putting it all together- and this task combined with whatever else you'll probably be doing will potentially be the busiest you've ever been in your entire life, as it was for me. Again I can't emphasize enough- this class is an insane amount of work and you need to plan around this. Do not take more than one or two other intense courses if possible. I took Analog Circuits (an also intense course) with this course and since I devoted my time to this class, my grade was severely impacted and was much lower than it would have been otherwise.

A big problem with this course that you need to plan around is the lack of workspace. You basically need to work in the embedded systems lab, spending days in there, since the computers there have the software which only runs on Linux and though it is possible to log in remotely, I found this to be far from usable. There were an insane number of smelly and rude grad students in there on most days, who would hog the computers by leaving their stuff around and talk loudly, have food, disrespect your personal space (hope you like being violated) etc. and unfortunately, I found that the only way around this was to adopt similar manners, else we literally would not be able to finish on time. All civility is lost when you have that big of a chunk of your grade on the line. My partner and I found ourselves hogging workstations and alternating so that one of us staffed the computer at all hours- she worked during the day and I would sleep and take over during the night.

Project aside, the midterm and final, while quite long, is actually quite do-able. Be sure to do the practice exams as usually the themes on the actual exams will be similar. However this point brings me to the discussion of how useful this course actually is. Because most of the class revolves around the project, which, when it comes down to it, is more grind work than "brain" work, you actually don't learn too much new stuff. The exams don't cover too much and can be easily studied for by doing the practice exams- the material isn't radically different from what you've seen before in Fundamentals of Comp Systems or electronic circuits. The main thing I took away from this course was how to use Cadence, the industry standard layout software. This skill in itself is actually quite useful- I was doing job apps simultaneously and found that Cadence gave me a huge advantage as it's used everywhere. However, a lot of the grind work I found unnecessary, as we used manual layout editing whereas in the field, we use auto-layout. So much for being "real-world," as Shepard bills it.

In summary... well it's not really possible to write a summary for this class. More work than I've ever done in my entire life and not all of it is probably necessary... but it's over now.

Workload:

Insane. The project will take a lot of your time, especially in the 2nd half of the semester. Expect to be basically living in the computer lab. Even for earlier problem sets, DO NOT START THE NIGHT BEFORE. This is coming from a guy that consistently does things last minute- I got hammered in the start because I ignored this advice. Exams are actually manageable compared to the project, just do the practice exams as that's usually what the exam is based on.

Directory Data

Dept/Subj Directory Course Professor Year Semester Time Section
ELEN / ELEN ELEN ELEN E4321: Digital Vlsi Circuits Kenneth Shepard 2012 Fall MW / 1:10- 2:25 PM 1
ELEN / ELEN ELEN ELEN E4321: Digital Vlsi Circuits Kenneth Shepard 2010 Fall MW / 1:10- 2:25 PM 1
ELEN / ELEN ELEN ELEN E4321: Digital Vlsi Circuits Kenneth Shepard 2009 Fall MW / 1:10- 2:25 PM 1
ELEN / ELEN ELEN ELEN E4321: Digital Vlsi Circuits Kenneth Shepard 2008 Fall MW / 1:10- 2:25 PM 1